Joint Seminar EME-IEEE Photonics/EDS/NTC Chapters

Date/Time: Tuesday 19 March at 2pm
Location: Australian National University, Research School of Physics Bldg#160, Room 4.03

Title: Heterogeneous integration of III-V nanowires on Group IV substrates and applications

By Katsuhiro Tomioka

Graduate School of Information Science and Technology and Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University, Japan

[email protected]

Abstract: III-V compound semiconductor nanowires (NWs) have been attracted much attention as alternative materials for future electronics and optics. Heterogeneous integration of the vertical III-V NWs is important for the device applications. The selective-area growth achieved to align vertical III-V NWs on Si by making As-incorporated Si(111) 1´1 surface and to form modulation-doped core-multishell (CMS), axial QD nuclei and CMS double heterostructures. Here we report on recent progress in selective-area growth of III-V NWs on Si and their applications such as light-emitting diodes (LEDs), field-effect transistors (FETs), and tunnel FETs (TFETs) using III-V/Si heterojunctions.

III-V nanowires (NWs) with CMS double heterostructure integrated on Si platform are promising materials as vertical TFET application. There are still challenges in using TFETs for building energy-efficient circuits application, which requires a moderately high conductance and steep SS for several decades of currents. This means high quality tunnel junctions should be further designed for satisfying these requirements for future ICs. A level of scalability and complementary switching similar to that of conventional FETs must also be assured. We present a vertical gate-all-around (VGAA) TFET that uses our designed vertical InGaAs NW/Si heterojunction with modulation doped CMS NW and demonstrate steep subthreshold slope as well as enhancement of tunnelling current. And I will introduce current project for next-generation electronics and photonics.

Bio: Katsuhiro Tomioka received his B.E., M.S. degrees of electrical engineering from Gunma University, Gunma, Japan, in 2003, 2005 (Prof. S. Adachi), and Ph.D. degrees of electronics and information engineering from Hokkaido University, Sapporo, Japan, in 2008 (Prof. T. Fukui). He has over 100 journal papers and 6 book chapters, with over 5,000 citations and a h-index of 32. He is also a co-inventor in over 30 World and Japanese patents related to nanowire LED, laser diodes, transistor, and nanowire integrations. Since 2016, he is associate Professor, Hokkaido University. His current research area is on the formation of semiconductor nanowires and devices for future application to low-power electrical switches and optical devices.