Verification Strategies

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Joel M Joy, NXP Semiconductor, Bangalore

An Executive Postgraduate in Management from IIM-Kozhikode and 12+ years of experience in VLSI technology (Front-End Design and Verification).
Currently he works with NXP managing ASIC verification projects and part of corporate strategic planning for growth in the DV domain. His technical expertise is into FPGA Design and ASIC Design & Verification of SoC/IP (Verilog, System Verilog, UVM). In the past he has worked with various clients such as Qualcomm, Intel, ADI, Texas Instruments, Samsung, Renesas and Nokia-Siemens Networks.


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