Lunch and Learn with Desjardins

Room: H655.2, Bldg: Hall Building, 1550 De Maisonneuve West, Montreal, Quebec, Canada, H3G 2E9

Desjardins and IEEE Concordia are happy to present a new edition of Lunch and Learn! Robotics and AI are at the forefront of hard tech applications and are central to the next generation of innovation. In this presentation, we will explore real-world applications of robotics and AI through examples of unique technologies in the biomedical, food robotics, humanoid robotics, Industry 4.0, and additive manufacturing domains. Using examples from Nicholas’ career, we will highlight the potential of robotics and AI in solving complex problems and streamlining workflows in the hard tech sector. This event is free and food will be served. DETAILS Date: February 14th, 2023Time: 12.00PM - 1:00PMLocation: H655 Price: Free Speaker(s): Nicholas Nadeau, Room: H655.2, Bldg: Hall Building, 1550 De Maisonneuve West, Montreal, Quebec, Canada, H3G 2E9

Mentor.e.s recherché.e.s // Call for Mentors – Stages d’un jour

Virtual: https://events.vtools.ieee.org/m/344771

JeunesExplo is creating internship opportunities to increase the visibility of Light Sciences in secondary schools We invite you to discover how you can get more involved in accompanying a young person for a one-day internship in your organization: https://JeunesExplo.eventbrite.ca The webinar will be in French. Questions in English and French are welcome. This webinar will be a chance to meet partners and hear testimonials on how to welcome a young person for a one-day internship. You can sign up to mentor already via https://www.jeunes-explorateurs.org/mentor/ We invite you to save the date of Thursday, April 20, 2023 for the one-day internship. Co-sponsored by: Optonique Speaker(s): Isabelle Cloutier, Denis Panneton Agenda: 10:00 - 11:30. Présentation de JeunesExplo Isabelle Cloutier (JeunesExplo) 11:30 - 11:45. Témoignages Stages d'un Jour Denis Panneton (INO) 11:45 - 12:00. Questions et annonces Matthew Posner (Optonique) Virtual: https://events.vtools.ieee.org/m/344771

Vancouver TALK 13: Rural Electrification Association

Virtual: https://events.vtools.ieee.org/m/344529

Speaker: Glen Fox Registration is optional, but we want to know who to expect. 10:00 AM P.S.T. You can log in at 9:45 AM (12:45 PM Montreal) to check connection and say hello.All IEEE members are welcome, especially those Life Members that don't have a local Affinity Group. There was no speaker for last month, busy with Christmas. We are looking for speakers for the rest of the year, contact Carl Zanon if interested. Speaker(s): Glen Fox, Agenda: In the 1940s, the Alberta government asked the Investor Owned Utilities (IOUs) to bring power to rural Alberta. The IOUs declined, citing cost as a factor. With this reality, Alberta farmers decided to step up and formed co-operatives, also known as Rural Electrification Associations (REAs), to bring electricity to rural Alberta. Virtual: https://events.vtools.ieee.org/m/344529

Maximizing the Data Rate of an Inductively Coupled Chip-to-Chip Link by Resetting the Channel State Variables

Room: 1.162, Bldg: EV, 1515 St. Catherine St. W, Montresl, Quebec, Canada

A technique is proposed for increasing the data rate transmitted through an inductively coupled chip-to-chip link by resetting the channel state variables. This allows the data rate to be increased well beyond what is implied by the channel bandwidth. In the proposed scheme, the two sides of the link are resonated at the highest possible quality factor, maximizing link gain, and minimizing interference. The transmit signal is a binary matched pulse which maximizes the received signal for a given transmitter voltage limit. High-efficiency switching transmitters can be used for this type of signal. The proposed technique can be applied to communication links in which channel state variables are accessible for reset. For increasing the data rate, it is shown that the proposed state-variable reset technique results in a higher signal-to-noise ratio of the received signal and a higher energy efficiency compared to reducing the quality factor to widen the bandwidth, using equalization, or using multi- level signaling. The technique is demonstrated on a chip-to-chip link with coupled 1.5 mm × 1.5 mm planar inductors separated by 0.5mm in a 0.18μm CMOS process. 500 Mb/s data rate is achieved over a link which has a band-pass bandwidth of 185 MHz. Co-sponsored by: Glenn Cowan Speaker(s): Dr. Nagendra Krishnapura, Room: 1.162, Bldg: EV, 1515 St. Catherine St. W, Montresl, Quebec, Canada

Photonics for AI and AI for Photonics

Hotel Bonaventure Montreal, 900 Rue De La Gauchetière O, Montréal, Quebec, Canada, H5A 1E4

The North American Workshop on Silicon Photonics for High-Performance Computing (SPHPC) will bring together experts in Silicon Photonics and in High-Performance Computing (HPC architects and experts, interconnect architects, HPC systems modeling, etc.) to discuss the state-of-the-art with Silicon Photonics based HPC interconnects and computing platforms (e.g., AI accelerators), and the main challenges that must be addressed to accelerate their development. It will consist of invited talks of the highest caliber from academia, industry, and government agencies as well as from different related disciplines. For SPHPC’23, we will focus on a special theme on Photonics for AI and AI for Photonics. In addition, SPHPC will host a student presentation session to invite students working in this area to present their projects at the workshop and receive feedback on their work. This is the event for meeting professionals in the field as well as exchanging and exploring new ideas. About SPHPC - https://www.engr.colostate.edu/SPHPC/ Silicon photonics has emerged as a promising solution to realize high-performance computing (HPC) systems required in the Big Data era. Having various applications in the domains of HPC, data centers, sensors and bio-sensing, aerospace, artificial intelligence (AI), etc., it has attracted researchers from academia and industries in different fields to explore various benefits and challenges of this technology. As an emerging area, it demands multidisciplinary collaborations and contributions, from material science and engineering, for realizing low-loss CMOS compatible components, to novel system architectures and software CAD and design tools to explore the design space of the resulting complex devices and systems. The North American Workshop on Silicon Photonics for High-Performance Computing (SPHPC) brings together experts from academia and industry working on silicon photonics and HPC (and other applications) to discuss the latest advances, remaining challenges, and research opportunities in this field. Co-sponsored by: Silicon Photonics high-performance computing (SPHPC), 29th IEEE International Symposium on High-Performance Computer Architecture (HPCA-29); Centre for Systems, Technologies and Applications for Radiofrequency and Communication (STARaCom); Agenda: To be announced Hotel Bonaventure Montreal, 900 Rue De La Gauchetière O, Montréal, Quebec, Canada, H5A 1E4