Seminar Abstract:

Nonvolatile memory (NVM) technologies such as ReRAM, 3D XPoint, PCM, and STT-MRAM have emerged as alternatives to DRAM thanks to their unique features, e.g., nonvolatility (persistence), comparable speed to DRAM, near-zero standby power, and low cost per bit. However, NVM poses a challenge in maintaining consistent program status across power failure. One issue arises from the possibility of a younger store, in program order, being evicted and persisted in NVM before an older one being buffered in volatile writeback caches. In the event of power failure, the old one is lost, leading to inconsistent NVM states upon power back. To address this challenge, I present two NVM crash consistency schemes: ReplayCache and PPA, for energy harvesting systems (EHS)—which collect energy from ambient environments and unfortunately experience frequent power failure—and datacenters, respectively.  ReplayCache for the first time enables a high-performance volatile writeback cache for EHS, outperforming the state-of-the-art work by 9x. On the other hand, PPA provides a high-performance crash consistency solution for server-class processors with a negligible hardware areal cost (0.005%) and run-time overhead (2%) compared to the regular server-class cores lacking crash consistency support.


About the Speaker:

Jianping Zeng is a final-year Ph.D. candidate in the Department of Computer Science at Purdue University. His research interests generally lie in designing more reliable and performant computing systems, including server-class systems and energy-harvesting systems, against soft errors and power failures. To achieve this, he usually co-designs compilers and architectures to maintain minimal hardware complexity while achieving high performance. His research works are typically published at top-tier system venues, e.g., PLDI, MICRO, ISCA, and ICS.