Abstract:Emerging memory technologies offer new opportunities to overcome the data-movement bottleneck of conventional computing architectures by enabling computation directly within dense memory arrays. This talk presents our recent progress in developing and experimentally demonstrating emerging memory arrays for hardware-based in-memory computing, with a particular focus on resistive random-access memory (RRAM), ferroelectric devices, vertical memory architectures, and AND-type Flash. Multi-level RRAM crossbar arrays are first explored as versatile hardware platforms for analog vector–matrix multiplication, associative memory, neuromorphic computing, hardware security, and generative AI. Precise pulse programming and verification schemes enable reliable conductance control despite the intrinsic stochasticity and device variation of filamentary switching. Beyond conventional planar arrays, vertical memristor and ferroelectric architectures are investigated toward higher integration density and three-dimensional memory-centric computing. Finally, AND-type Flash arrays are demonstrated as a scalable computing platform, where array-level non-idealities including off-current accumulation, GIDL, and interconnect-induced IR drop are experimentally analyzed. An adaptive compensation approach is introduced to mitigate these errors and improve the accuracy of vector–matrix multiplication. These results highlight how device engineering, array architecture, and hardware-aware compensation can jointly advance emerging memory technologies toward scalable and reliable in-memory computing systems.

bio:Sungjun Kim is an Associate Professor in the Department of Electronic and Electrical Engineering at Dongguk University, South Korea. His research focuses on emerging memory technologies, neuromorphic electronics, in-sensor computing, and in-memory computing hardware for next-generation artificial intelligence systems. Before joining academia, he worked at Samsung Electronics, where he contributed to the development of phase-change memory (PRAM) and ovonic threshold switch (OTS) selector technologies for future non-volatile memory applications. He received his BS degree from Hanyang University and his MS and PhD degrees in Electrical and Computer Engineering from Seoul National University. His current research interests include resistive random-access memory (RRAM), ferroelectric devices, oxide semiconductor electronics, memory-centric AI hardware, and neuromorphic computing systems. He serves as a committee member of the Memory Division of the K-Chips Program in Korea. He will also serve as an Editor of Applied Surface Science (Elsevier) beginning in March 2027.